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| 85 clk osc crystal clock oscillators 97smo(k) t 1.000 mhz to 100.000 mhz 1.000 mhz to 70.000 mhz 97smo(ke) : ? 100 ppm 97smo(kx) : ? 100 ppm 97smo(kf) : ? 50 ppm 97smo(ky) : ? 50 ppm 97smo(kg) : ? 30 ppm 97smo(kz) : ? 30 ppm 97smo(kh) : ? 25 ppm 97smo(kzs) : ? 25 ppm 97smo(kj) : ? 20 ppm 97smo(kzz) : ? 20 ppm 0?c to 70?c (standard) - 40?c to 85?c (w) 5v dc ? 10% v ih : 2.2v dd min. v il : 0.8v dd max. t - 0.5v to 7.0v dc - 55?c to 125?c 20 ma max. (1.0mhz to 37.0mhz) 30 ma max. (1.0mhz to 37.0mhz) 45 ma max. (33.0mhz to 50.0mhz) 55 ma max. (33.0mhz to 50.0mhz) 50 ma max. (50.0mhz to 70.0mhz) 60 ma max. (50.0mhz to 70.0mhz) 70 ma max. (70.0mhz to 100.0mhz) 50 a max. (pin #1=v il ) 40% to 60% at 50%v dd level 10 ns max. (10%v dd to 90%v dd level) v ol : 10%v dd max. v oh : 90%v dd min. 15 pf max. (cmos) 50 pf max. (cmos) 100 ns max. 10 ms max. ? 5 ppm max. at 25?c ? 3?c for first year 250?c ? 10?c for 10 seconds 170?c ? 10?c for 1 to 2 minutes (preheating) metal ceramic seam tungsten (metalized) gold / nickel (surface) / (under) compliant (pb-free) lid base sealing terminal terminal plating rohs 97smo(k) 97smo(k) 97smo(k) (+5v fixed models) standard smd clock oscillators standard specifications package data package item item specifications ( t 1) final exact part number to be determined with frequency, frequency stability and operating temperature. e.g. 97smo(ky)w 50.000 mhz. ( t 2) internal crystal oscillation to be halted (pin#1 = v il ). generic part number frequency range frequency stability (0?c to 70?c) over all conditions operating conditions operating temperature input voltage (v dd ) tri-state control voltage (pin#1) absolute max. ratings supply voltage storage temperature input current stand - by current t 2 output ( - 40?c to 85?c) symmetry rise and fall times "0" level "1" level load enable / disable delay time startup time aging reflow condition 7.0 0.2 5.0 0.2 1.3 0.2 1.2 1.4 1.4 3.68 5.08 1.2 2.6 #4 #3 #1 #2 #1 #2 #4 #3 pin 1 connection "l" 2 gnd 3z open or "h" output z : high impedance 4v dd 97smo(k) tf t t 90% or 80% v dd 10% or 20% v dd ov dc symmetry=t/t 100(%) 50% v dd tr gnd v oh ("1"level) v ol ("0"level) v dd output waveform v dc power supply cl : including fixture and probe capacitance. v dd v dd cl t est point #2 #3 output tri-state gnd #1 #4 0.01 f ? 0.1 f e/d sw a test circuit 1.8 3.28 1.8 2.0 2.2 2.0 5.08 0.01 f ? 0.1 f soldering pattern a 7.65 5.75 16.0 7.5 8.0 2.0 0.3 2.2 178 1000pcs qty/reel b c d f j l m reel dia. 4.0 0.1 2.0 0.1 1.75 0.1 + 0.1 - 0 1.5 l b f d a c j m t ape specifications actual size
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